Power & Signal Sources

Every circuit needs two things before it does anything useful: a way to get power, and — for anything dynamic — a way to get stimulus. de:volt splits this into power supplies (the Battery Pack, the 9 V Battery, the CR2032 Coin Cell, and the Bench PSU) and signal sources (the Signal Generator, the Pulse Generator, and the Clock Generator). This page covers what each one does and how its model behaves in the simulator.

The Ground reference

Before any supply matters, a circuit needs a Ground node — the 0 V reference that every other voltage is measured against. There is exactly one ground potential in a design (net gnd), and the solver needs it: without a node tied to ground the simulation has no fixed reference and the matrix is singular.

A supply does nothing on its own. It is passive until both terminals are wired — its + output sets a rail’s voltage only once its − terminal returns to ground and the + terminal reaches the part you want to power. Connecting only the + lead leaves the circuit floating. The usual pattern on a breadboard is: supply + to the red rail, supply − to the blue/GND rail, and the blue rail tied to ground. See Getting Started and Breadboard Mode for how the rails are laid out and wired.

Power supplies

All four supplies expose two pins — pos (+) and neg (−) — and a voltage param editable in the Inspector. They differ in their voltage range and, for the batteries, in how they sag under load.

Battery Pack — supply-5v

A 4×AA holder, the primary DC rail for simple projects. Modelled as a near-ideal source at its voltage param.

Four fresh alkaline cells sit around 6 V; under load they settle toward 5 V, which is why the default is 5 V. Wire pos to the red rail and neg to the blue/GND rail. Good for logic and small loads that are happy on 5 V.

9 V Battery — battery-9v

A PP3 / 6LR61 brick for things that want more headroom — Arduino boards, buzzers, small amplifiers.

Unlike the Battery Pack, the 9 V cell models internal resistance. The terminal voltage drops as the load draws current:

Vterm = Voc − rInternal × I

So a stiff load pulls the rail below 9 V, and the harder you pull, the more it sags. rInternal defaults to 1.5 Ω (a fresh cell); raise it to mimic an aging battery. The charge param (0..1) is a static state-of-charge knob — it scales the open-circuit voltage Voc but does not simulate real-time coulomb counting, so the battery never actually drains as time passes.

CR2032 Coin Cell — battery-coin-cr2032

A 3 V lithium coin cell for backup power — RTC chips, MCU keep-alive, low-power sensor boards.

The defining trait is its high internal resistance (10 Ω default). The same Vterm = Voc − rInternal × I relation applies, but with rInternal this large the terminal voltage sags hard under even modest loads — peak draw is typically under 5 mA. Reach for it when you need a long-life backup rail, not when you need current.

Bench PSU — supply-var

An adjustable lab supply: set the voltage anywhere in range and cap the current.

This is the supply for any rail that isn’t 5 V — 3.3 V logic, 9 V buzzers, 12 V relay coils. The iLimit param sets a current limit, the same way a real bench supply folds back when a load tries to draw too much. Wire pos and neg exactly like the batteries.

Signal sources

These are bench instruments, not bill-of-materials parts — they stand in for a function generator on your bench, so they are included on every plan and don’t appear in the BOM. Each drives a node so you can watch the response on the scope. Pair them with the Oscilloscope & Analysis tools to see waveforms and measure timing. Every param below is editable in the Inspector, and the Inspector shows a waveform preview (plus presets for the Signal Generator).

Signal Generator — signal-gen

The unified function generator — one part covering every common waveform. Pins are pos (out) and neg (GND).

The output follows:

V(t) = offset + amplitude × unit(t)

where unit(t) is the normalised waveform shape. With the defaults (offset = 2.5 V, amplitude = 2.5 V, sine) the output swings 0–5 V — a single-supply-friendly sine. rSource is the 50 Ω series output resistance of the source, the bench standard; it forms a divider with whatever load you attach, so a low-impedance load pulls the delivered amplitude down. For the pwl waveform the points are absolute volts, given as t:v,t:v pairs (not deltas).

Pulse Generator — pulse-source

A dedicated rectangular pulse source for deterministic logic edges. Pins are pos (out) and neg (GND).

These follow the SPICE trapezoid convention: the source idles at v1, waits td, ramps to v2 over tr, holds for pw, falls back over tf, and repeats every per. Use it when you want a clean, repeatable edge to clock a flip-flop or trigger a 555 rather than the more general Signal Generator.

Clock Generator — clock-1khz

A square-wave clock — the quickest way to drive a counter or shift register without building a 555 astable. Pins are out (Q) and gnd (GND).

Drop it in, point Q at the clock input of the chip you’re driving, and tie GND to ground. For deterministic counting circuits this is far less fiddly than wiring up a real oscillator.

Example: stimulus into a scope

A signal source needs a ground return and a measurement point, nothing more:

Signal Generator out (pos) ─┬─── to circuit under test
                            │
                          [scope probe]
                            │
Signal Generator GND (neg) ─┴─── GND

Wire the source GND to the same ground as the rest of the circuit, probe the node you care about, and run the simulation. See Oscilloscope & Analysis for reading the trace.

Simulator behaviour

• Supplies are passive until wired: a + terminal with no return path sets nothing. Always close the loop to ground.
• The Battery Pack and Bench PSU are near-ideal at their set voltage (the PSU also enforces iLimit). Only the 9 V Battery and CR2032 model rInternal sag.
• charge is a static SoC knob — it scales open-circuit voltage but does not drain over time, so batteries never run flat during a run.
• Signal sources are bench instruments: included on every plan, not in the BOM, and carry a rSource output resistance you should account for when driving low-impedance loads.