Power & Signal Sources

Every circuit needs two things before it does anything useful: a way to get power and, for anything dynamic, a stimulus. de:volt splits this into power supplies (the Battery Pack, the 9 V Battery, the CR2032 Coin Cell, and the Bench PSU) and signal sources (the Signal Generator, the Pulse Generator, and the Clock Generator). This page explains both the useful behaviour and the limits of each model.

The Ground reference

Before any supply matters, a circuit needs a Ground node: the 0 V reference that every other voltage is measured against. There is exactly one ground potential in a design (net gnd), and the solver needs it: without a node tied to ground the simulation has no fixed reference and the matrix is singular.

A supply does nothing on its own. It is passive until both terminals are wired: its + output sets a rail’s voltage only once its − terminal returns to ground and the + terminal reaches the part you want to power. Connecting only the + lead leaves the circuit floating. The usual pattern on a breadboard is: supply + to the red rail, supply − to the blue/GND rail, and the blue rail tied to ground. See Getting Started and Breadboard Mode for how the rails are laid out and wired.

Power supplies

All four supplies expose two pins, pos (+) and neg (−). They differ in their voltage range and in how they react to load.

Battery Pack: supply-5v

A 4×AA alkaline holder, the primary DC rail for simple projects. This is a discharging battery model, not an ideal 5 V source.

Four fresh alkaline cells can start near 6.4 V. The open-circuit voltage follows an alkaline discharge curve, while internal resistance rises as charge falls and when the ambient is cold. Wire pos to the red rail and neg to the blue/GND rail. Check that every connected part tolerates the pack’s fresh voltage; this source is not a regulated 5 V rail.

9 V Battery: battery-9v

A PP3 / 6LR61 brick for things that want more headroom: Arduino boards, buzzers, small amplifiers.

The terminal voltage drops as the load draws current:

Vterm = Voc − rInternal × I

So a heavy load pulls the rail below its open-circuit voltage. The model coulomb-counts delivered current from the 0.55 Ah reference capacity. As state of charge falls, both the chemistry-shaped open-circuit voltage and resistance change. A real PP3 provides less usable capacity at high drain than this compact model predicts.

CR2032 Coin Cell: battery-coin-cr2032

A 3 V lithium coin cell for backup power: RTC chips, MCU keep-alive, low-power sensor boards.

The defining trait is its high internal resistance (10 Ω fresh-cell reference). The same Vterm = Voc − rInternal × I relation applies, but modest loads can already cause substantial sag. The 235 mAh capacity reference comes from a very light datasheet load. Pulse loads reduce usable real-world capacity more than this compact coulomb counter predicts. Reach for a CR2032 for low-current backup, not for motors, servos, or other bursty loads.

What all three battery models include

For the exact catalog identities above, the engine stores runtime state of charge, subtracts delivered charge after each accepted simulation interval, and rolls that state back if a solver step is rejected. Reverse current does not recharge these primary-cell models. Editing charge resets the runtime battery state.

The model includes a chemistry-shaped open-circuit-voltage curve, load sag, resistance growth with depletion, and a cold-temperature resistance effect. It does not include Peukert/rate-capacity loss, post-load recovery, self-discharge, aging, cell imbalance, rechargeable chemistry, or internal battery heating. A legacy or custom battery_pack without one of these exact catalog IDs uses a labelled generic fallback; the simulator does not guess a chemistry from voltage alone.

Bench PSU: supply-var

An adjustable lab supply: set the voltage anywhere in range and cap the current.

This is the supply for rails such as 3.3 V logic, 9 V buzzers, or 12 V relay coils. Below iLimit it operates in constant-voltage (CV) mode. When the load asks for more, it enters constant-current (CC) mode and lets the output voltage sag rather than exceeding the limit. This is not a detailed supply-loop model: output capacitance, ripple, foldback, remote sensing, startup transients, and thermal shutdown are omitted.

Signal sources

These are bench instruments, not bill-of-materials parts. They stand in for a function generator on your bench, so they are included on every plan and do not appear in the BOM. Pair them with the Oscilloscope & Analysis tools to see waveforms and measure timing. Every parameter below is editable in the Inspector, and the Inspector shows a waveform preview plus presets for the Signal Generator.

Signal Generator: signal-gen

The unified function generator: one part covering every common waveform. Pins are pos (out) and neg (GND).

The output follows:

V(t) = offset + amplitude × unit(t)

where unit(t) is the normalised waveform shape. With the defaults (offset = 2.5 V, amplitude = 2.5 V, sine) the no-load output swings 0–5 V. rSource is the 50 Ω series output resistance; it forms a divider with the attached load, so a low-impedance load reduces the delivered amplitude. For pwl, points are absolute volts in t:v,t:v form and ignore offset and amplitude.

Noise is deterministic zero-mean Gaussian noise, updated at 10 kSa/s and held between updates. amplitude is its 1-sigma RMS voltage; the zero-order hold has a declared 5 kHz one-sided equivalent noise bandwidth. The source does not model amplifier bandwidth, slew limits, output current limiting, load-dependent distortion, or arbitrary analogue noise spectra.

Pulse Generator: pulse-source

A dedicated rectangular pulse source for deterministic logic edges. Pins are pos (out) and neg (GND).

These follow the SPICE trapezoid convention: the source idles at v1, waits td, ramps to v2 over tr, holds for pw, falls back over tf, and repeats every per. Set per to 0 for a one-shot that returns to v1. This is an ideal voltage source with no output impedance, current limit, jitter, ringing, or bandwidth limit.

Clock Generator: clock-1khz

A square-wave clock: the quickest way to drive a counter or shift register without building a 555 astable. Pins are out (Q) and gnd (GND).

Drop it in, point Q at the clock input of the chip you are driving, and tie GND to ground. This is an ideal 0–5 V timed source with no output impedance, current limit, edge slew, jitter, or phase noise.

Example: stimulus into a scope

A signal source needs a ground return and a measurement point, nothing more:

Signal Generator out (pos) ─┬─── to circuit under test
                            │
                          [scope probe]
                            │
Signal Generator GND (neg) ─┴─── GND

Wire the source GND to the same ground as the rest of the circuit, probe the node you care about, and run the simulation. See Oscilloscope & Analysis for reading the trace.

Simulator behaviour

• Supplies are passive until wired: a + terminal with no return path sets nothing. Always close the loop to ground.
• Exact catalog batteries discharge over simulated time and sag under load. Their capacity values are reference-drain approximations, not guarantees for every load profile.
• The Bench PSU has CV and CC regimes, but no detailed control-loop, ripple, or thermal model.
• The Signal Generator has finite rSource; the dedicated Pulse and Clock generators are ideal voltage sources.
• Sources and instruments do not make the whole simulator hardware-exact. Use the Inspector’s Included / Not included model disclosure and verify designs against component datasheets and bench measurements.